Analog-devices ADSP-2181 Instrukcja Użytkownika Pobierz pdf (Strona 21)

ADSP-2181/ADSP-2183

REV. 0

–21–

ADSP-2181

Parameter Min Max Unit

Interrupts and Flag

Timing Requirements:

IFS

IRQx, FI, or PFx Setup before CLKOUT Low

1, 2, 3, 4

0.25t

+ 15 ns

IFH

IRQx, FI, or PFx Hold after CLKOUT High

1, 2, 3, 4

0.25t

Switching Characteristics:

FOH

Flag Output Hold after CLKOUT Low

0.5t

– 7 ns

FOD

Flag Output Delay from CLKOUT Low

0.25t

+ 5 ns

ADSP-2183

28.8 MHz

Parameter Min Max Unit

Interrupts and Flag

Timing Requirements:

IFS

IRQx, FI, or PFx Setup before CLKOUT Low

1, 2, 3, 4

0.25t

+ 15 ns

IFH

IRQx, FI, or PFx Hold after CLKOUT High

1, 2, 3, 4

0.25t

Switching Characteristics:

FOH

Flag Output Hold after CLKOUT Low

0.5t

– 7 ns

FOD

Flag Output Delay from CLKOUT Low

0.25t

+ 6 ns

NOTES

If IRQx and FI inputs meet t

IFS

and t

IFH

setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on

the following cycle. (Refer to “Interrupt Controller Operation” in the Program Control chapter of the User’s Manual for further information on interrupt servicing.)

Edge-sensitive interrupts require pulse widths greater than 10 ns; level-sensitive interrupts must be held low until serviced.

IRQx = IRQ0, IRQ1, IRQ2, IRQL0, IRQL1, IRQE.

PFx = PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7.

Flag outputs = PFx, FL0, FL1, FL2, Flag_out

FOD

FOH

IFH

IFS

CLKOUT

FLAG

OUTPUTS

IRQ

PFx

Figure 23. Interrupts and Flags

1 2 ... 16 17 18 19 20 21 22 23 24 25 26 ... 39 40

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